PJRC Teensy 4.1

Overview

The PJRC Teensy 4.1 is the larger, more feature-rich sibling of the Teensy 4.0, sharing the same NXP i.MX RT1062 ARM Cortex-M7 at 600MHz but adding a native 100Mbps Ethernet PHY, an SD card socket, and a significantly expanded pin count. It is positioned for applications requiring substantial processing power, extensive memory, network connectivity, or both USB host and device operation simultaneously.

At its core, the i.MX RT1062 provides 1MB of tightly-coupled RAM (512KB accessible as fast TCM), 2MB of Flash, and the full complement of peripherals that made the Teensy 4.0 popular: hardware cryptographic acceleration (AES, SHA, RSA), a true random number generator, FlexIO programmable I/O, a graphics pipeline, 3 CAN Bus controllers (one with CAN FD), and two USB 2.0 HS ports at 480Mbps each. The 100Mbps Ethernet PHY enables wired networking without a separate shield.

The Teensy 4.1's 61×17.8mm board exposes 55 digital I/O pins (all interrupt-capable), 18 analog inputs across two independent ADCs, and 35 PWM outputs. A 4-bit SDIO SD card socket provides fast storage access. Serial, SPI, I2C, and I2S peripherals match the Teensy 4.0's count (7 serial, 3 SPI, 3 I2C, 2 I2S). Pads on the bottom of the board allow optional PSRAM or Flash chips to be added for projects requiring additional memory.

The Teensy 4.1 is programmed through Teensyduino — an Arduino IDE add-on maintained by PJRC — and benefits from an active community developing audio, USB host, MIDI, and networking libraries. The Teensy Loader application handles firmware flashing without a separate programmer.