APIO

1 device

Devices compatible with APIO — open source FPGA development ecosystem with unified toolchain management for iCE40 and other FPGAs.

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UPduino v3.1

FPGA
UPduino v3.1

A low-cost, fully open source FPGA development board built on the Lattice ICE40UP5K with 5.3K LUTs, on-board FTDI FT232H USB programmer, 4MB qSPI flash, and 39 GPIO pins on PMOD-compatible headers.

Lattice ICE40UP5K (5.3K LUT FPGA)1Mbit SPRAM + 120Kbit DPRAM4MB39 GPIOWiFi NoBLE NoZigbee NoEthernet No
Fpga DevelopmentDigital Logic EducationRisc V Soft Coreprototyping
~$36View

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