# iCESugar-Pro FPGA Development Board > Open-source Lattice ECP5 FPGA dev board with 24K LUTs, 32MB SDRAM, 32MB SPI flash, 106 GPIO pins in DDR SODIMM form factor. Supports fully open-source toolchain (Yosys + Nextpnr) and RISC-V Linux. ## Quick Facts - **Brand:** MuseLab - **Board Type:** FPGA - **Price:** ~$60 - **Product Readiness:** developer - **CPU:** Lattice ECP5 LFE5U-25F (24K LUT FPGA) - **CPU Architecture:** FPGA (Lattice ECP5) - **CPU Cores:** N/A (FPGA) - **RAM:** 32MB SDRAM - **Flash:** 32MB SPI - **USB:** USB-C - **Power:** 5V - **Operating Voltage:** 3.3V - **Antenna:** N/A - **SD Card:** microSD ## Connectivity - **Wifi:** false - **Bluetooth:** false - **Zigbee:** false - **Ethernet:** false ## Open Source - **Status:** fully-open - **Firmware:** Yes - **Schematics:** Yes - **PCB Layout:** Yes ## Use Cases - custom-logic-design - fpga-prototyping - risc-v-development - fpga-linux - hdmi-video-output - digital-signal-processing - embedded-systems-education - educational-platform - prototyping - hardware-accelerated-iot ## Components - **LFE5U-25F-6BG256C** (fpga): Lattice Semiconductor ECP5 FPGA with 24K LUTs, 1008Kb embedded memory, 28 DSP multipliers, 1 PLL, in BGA-256 package. Fully supported by open-source Yosys + Nextpnr toolchain. — [Datasheet](https://openhardware.directory/r?to=https%3A%2F%2Fgithub.com%2Fwuxx%2Ficesugar-pro%2Fblob%2Fmaster%2Fdoc%2FFPGA-DS-02012-1-9-ECP5-ECP5G-Family-Data-Sheet-1022822.pdf&ref=openhardware.directory&product=icesugar-pro&source=md-export) - **IS42S16160B** (memory): ISSI IS42S16160B 256Mbit (32MB) synchronous DRAM with 16-bit data bus, suitable for frame buffers and running Linux on soft-core RISC-V processors. — [Datasheet](https://openhardware.directory/r?to=https%3A%2F%2Fgithub.com%2Fwuxx%2Ficesugar-pro%2Fblob%2Fmaster%2Fdoc%2FIS42S16160B.pdf&ref=openhardware.directory&product=icesugar-pro&source=md-export) - **W25Q256JV** (flash-memory): Winbond W25Q256JV 256Mbit (32MB) SPI NOR flash memory with dual/quad SPI support and up to 133MHz clock for FPGA bitstream and firmware storage. — [Datasheet](https://openhardware.directory/r?to=https%3A%2F%2Fgithub.com%2Fwuxx%2Ficesugar-pro%2Fblob%2Fmaster%2Fdoc%2Fw25q256jv.pdf&ref=openhardware.directory&product=icesugar-pro&source=md-export) - **APM32F1 (iCELink)** (debugger): Geehy APM32F1 ARM Cortex-M3 MCU running ARM Mbed DAPLink firmware. Provides drag-and-drop bitstream programming via virtual USB drive, USB CDC serial port directly connected to FPGA, and dual JTAG interfaces (native ECP5 + GPIO-based for custom SoC). — [Datasheet](https://openhardware.directory/r?to=https%3A%2F%2Fglobal.geehy.com%2Fapm32%3Fid%3D13&ref=openhardware.directory&product=icesugar-pro&source=md-export) ## Protocols - **SPI** - **SDIO** - **JTAG** - **UART** - **USB CDC** - **GPIO** ## Available Software - **[Yosys](https://openhardware.directory/r?to=https%3A%2F%2Fgithub.com%2FYosysHQ%2Fyosys&ref=openhardware.directory&product=icesugar-pro&source=md-export)**: Open-source RTL synthesis framework for Verilog. - **[Nextpnr](https://openhardware.directory/r?to=https%3A%2F%2Fgithub.com%2FYosysHQ%2Fnextpnr&ref=openhardware.directory&product=icesugar-pro&source=md-export)**: Open-source FPGA place-and-route tool supporting ECP5. - **[Project Trellis](https://openhardware.directory/r?to=https%3A%2F%2Fgithub.com%2Fenjoy-digital%2Flitex&ref=openhardware.directory&product=icesugar-pro&source=md-export)**: Open-source ECP5 bitstream documentation and tools. - **[LiteX](https://openhardware.directory/r?to=https%3A%2F%2Fgithub.com%2Fenjoy-digital%2Flitex&ref=openhardware.directory&product=icesugar-pro&source=md-export)**: Python-based SoC builder framework for running RISC-V Linux on FPGA. - **[icesprog](https://openhardware.directory/r?to=https%3A%2F%2Fgithub.com%2Fwuxx%2Ficesugar-pro&ref=openhardware.directory&product=icesugar-pro&source=md-export)**: Command-line FPGA programming tool for iCESugar boards. - **[oss-cad-suite](https://openhardware.directory/r?to=https%3A%2F%2Fgithub.com%2FYosysHQ%2Foss-cad-suite-build&ref=openhardware.directory&product=icesugar-pro&source=md-export)**: Complete open-source EDA toolchain bundle including Yosys, Nextpnr, and more. ## Description ## Overview The iCESugar-Pro is an open-source FPGA development board built around the Lattice ECP5 LFE5U-25F-6BG256C, offering 24K LUTs, 1008Kb of embedded memory, and 28 hardware DSP multipliers. Designed in a compact DDR2 SODIMM form factor with a 200-pin edge connector, it exposes 106 usable I/O pins for maximum flexibility in custom digital logic designs, hardware prototyping, and soft-core processor development. The board includes 32MB of ISSI IS42S16160B SDRAM and 32MB of Winbond W25Q256JV SPI flash, providing enough memory to run a full RISC-V Linux system using the LiteX framework. An integrated iCELink debugger based on the APM32F1 ARM MCU offers drag-and-drop bitstream programming via a virtual USB drive, USB CDC serial communication directly connected to the FPGA, and dual JTAG interfaces for both native ECP5 debugging and custom SoC debugging. What sets the iCESugar-Pro apart is its commitment to the fully open-source FPGA toolchain. Development uses Yosys for synthesis, Nextpnr for place-and-route, and Project Trellis for ECP5 bitstream generation — no proprietary tools required. The board also includes an SD card slot supporting both SPI and SDIO modes, an RGB status LED, and a 25MHz crystal oscillator, making it a complete platform for FPGA education, RISC-V experimentation, and custom hardware accelerator prototyping. ## Where to Buy - [Tindie](https://openhardware.directory/r?to=https%3A%2F%2Fwww.tindie.com%2Fproducts%2Fjohnnywu%2Ficesugar-pro-fpga-development-board%2F&ref=openhardware.directory&product=icesugar-pro&source=md-export) — $60.00 ## Resources - [product](https://openhardware.directory/r?to=https%3A%2F%2Fwww.tindie.com%2Fproducts%2Fjohnnywu%2Ficesugar-pro-fpga-development-board%2F&ref=openhardware.directory&product=icesugar-pro&source=md-export) - [github](https://openhardware.directory/r?to=https%3A%2F%2Fgithub.com%2Fwuxx%2Ficesugar-pro&ref=openhardware.directory&product=icesugar-pro&source=md-export) - [datasheet](https://openhardware.directory/r?to=https%3A%2F%2Fgithub.com%2Fwuxx%2Ficesugar-pro%2Fblob%2Fmaster%2Fdoc%2FFPGA-DS-02012-1-9-ECP5-ECP5G-Family-Data-Sheet-1022822.pdf&ref=openhardware.directory&product=icesugar-pro&source=md-export) - [schematics](https://openhardware.directory/r?to=https%3A%2F%2Fgithub.com%2Fwuxx%2Ficesugar-pro%2Ftree%2Fmaster%2Fschematic&ref=openhardware.directory&product=icesugar-pro&source=md-export) ## Tags `fpga`, `lattice-ecp5`, `open-source`, `risc-v`, `yosys`, `nextpnr`, `sodimm`, `icesugar`, `muselab`, `litex`, `icelink`, `verilog` ## Images ![iCESugar-Pro FPGA Development Board](https://nbg1.your-objectstorage.com/openhardware-directory/entities/icesugar-pro/4f437ee8253f.jpg) --- [View full device page](https://openhardware.directory/devices/icesugar-pro)