iCESugar-Pro FPGA Development Board - image 1
MuseLab·FPGA

iCESugar-Pro FPGA Development Board

Open-source Lattice ECP5 FPGA dev board with 24K LUTs, 32MB SDRAM, 32MB SPI flash, 106 GPIO pins in DDR SODIMM form factor. Supports fully open-source toolchain (Yosys + Nextpnr) and RISC-V Linux.

Starting from

$60.00

Specifications

CPU CoresN/A (FPGA)
Clock Speed25MHz (crystal oscillator)
GPIO Level3.3V
Power Input5V
WiFifalse
Bluetoothfalse
Zigbeefalse
Ethernetfalse
AntennaN/A
StoragemicroSD

Components

Lattice ECP5 FPGAFpgaDatasheet

Lattice Semiconductor ECP5 FPGA with 24K LUTs, 1008Kb embedded memory, 28 DSP multipliers, 1 PLL, in BGA-256 package. Fully supported by open-source Yosys + Nextpnr toolchain.

ISSI 32MB SDRAMMemoryDatasheet

ISSI IS42S16160B 256Mbit (32MB) synchronous DRAM with 16-bit data bus, suitable for frame buffers and running Linux on soft-core RISC-V processors.

Winbond 32MB SPI FlashFlash MemoryDatasheet

Winbond W25Q256JV 256Mbit (32MB) SPI NOR flash memory with dual/quad SPI support and up to 133MHz clock for FPGA bitstream and firmware storage.

iCELink Onboard DebuggerDebuggerDatasheet

Geehy APM32F1 ARM Cortex-M3 MCU running ARM Mbed DAPLink firmware. Provides drag-and-drop bitstream programming via virtual USB drive, USB CDC serial port directly connected to FPGA, and dual JTAG interfaces (native ECP5 + GPIO-based for custom SoC).

Bus Interfaces

SPI
SPI interface for flash memory and SD card communication.
SDIO
SDIO interface for high-speed SD card access.
JTAG
Dual JTAG interfaces: native ECP5 JTAG and GPIO-based JTAG for custom SoC debugging.
UART
USB CDC serial port via iCELink debugger directly connected to FPGA.
USB CDC
USB Communications Device Class virtual serial port for FPGA communication.
GPIO
106 general-purpose I/O pins via DDR2 SODIMM-200P edge connector.

Overview

The iCESugar-Pro is an open-source FPGA development board built around the Lattice ECP5 LFE5U-25F-6BG256C, offering 24K LUTs, 1008Kb of embedded memory, and 28 hardware DSP multipliers. Designed in a compact DDR2 SODIMM form factor with a 200-pin edge connector, it exposes 106 usable I/O pins for maximum flexibility in custom digital logic designs, hardware prototyping, and soft-core processor development.

The board includes 32MB of ISSI IS42S16160B SDRAM and 32MB of Winbond W25Q256JV SPI flash, providing enough memory to run a full RISC-V Linux system using the LiteX framework. An integrated iCELink debugger based on the APM32F1 ARM MCU offers drag-and-drop bitstream programming via a virtual USB drive, USB CDC serial communication directly connected to the FPGA, and dual JTAG interfaces for both native ECP5 debugging and custom SoC debugging.

What sets the iCESugar-Pro apart is its commitment to the fully open-source FPGA toolchain. Development uses Yosys for synthesis, Nextpnr for place-and-route, and Project Trellis for ECP5 bitstream generation — no proprietary tools required. The board also includes an SD card slot supporting both SPI and SDIO modes, an RGB status LED, and a 25MHz crystal oscillator, making it a complete platform for FPGA education, RISC-V experimentation, and custom hardware accelerator prototyping.

Use Cases

10

Resources

Where to Buy

Available Software

6

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